Hardware Design
This is a collection of my hardware projects.
Verilog Projects
These should all synthesize for a Xilinx Spartan-3E.
| File | Description | Updated |
|---|---|---|
| acia.v | Altair 680 ACIA (Asynchronous Communications Interface Adaptor). | 2007-09-03 |
| altair680.v | Altair 680. | 2007-09-03 |
| altair680t.v | Altair 680 connected to a terminal. | 2007-09-03 |
| basic_rom.v | Microsoft BASIC interpretor ROM for the Altair 680. | 2007-09-03 |
| fifo.v | A simple FIFO buffer. | 2007-09-29 |
| m6800.v | Motorola 6800 processor core. | 2007-09-03 |
| mmu.v | Altair 680 memory management unit. | 2007-09-03 |
| prom1.v | Altair 680 PROM 1. | 2007-09-03 |
| ps2.v | PS/2 keyboard controller (supports reading upper-case ASCII). | 2007-09-27 |
| ram.v | 16 KB RAM (for the Altair 680 project). | 2007-09-27 |
| terminal.v | Terminal interface. | 2007-09-03 |
| uart.v | UART (data lines only). | 2007-09-03 |
| vga.v | A 80x30 character VGA controller (640x480 pixels at 60 Hz). | 2007-09-27 |
Q1 Computer
The Q1 is an all-transistor computer project. More Information.